Reducing Qrr in high-voltage SuperJunction MOSFETs by using the cascode configuration
Publication date:
2017
Publisher version:
Descripción física:
p. 1970-1977
Description:
IEEE Annual Applied Power Electronics Conference and Exposition (APEC) (32nd. 2017. Tampa)
ISBN:
978-1-5090-5366-7
Patrocinado por:
This work has been supported by the Spanish Government under Project MINECO-13-DPI2013-47176-C2-2-R, MINECO-15-DPI2014-56358-JIN, the scholarship FPU14/03268 and the Principality of Asturias under the Project FC-15- GRUPIN14-143 and by European Regional Development Fund (ERDF) grants.