Low output voltage ac/dc converter with a new scheme of synchronous rectification that complies with IEC 1000-3-2 regulations
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The aim of this paper is to study the performance of an AC/DC converter with low output voltage and low input current harmonic content. In order to obtain low output voltages with a high efficiency, synchronous rectification is mandatory. When the output voltage is low, it is very difficult to use self-driven synchronous rectification and additional windings are used to properly drive the metal oxide semiconductor field effect transmitters (MOSFETs). Besides this, IEC 1000-3-2 regulations impose low input current harmonic contents for power levels higher than 75 W. In this paper, a recently proposed synchronous rectification scheme is combined with a modified input current shaper to design a 100 W, 3.3 V AC/DC converter that complies with IEC 1000-3-2 regulations. The efficiency obtained in the prototype was very high for this application (86%) and both the size increase and the cost increase were quite low in comparison with the original topology with no synchronous rectification and no IEC 1000-3-2 compliance
The aim of this paper is to study the performance of an AC/DC converter with low output voltage and low input current harmonic content. In order to obtain low output voltages with a high efficiency, synchronous rectification is mandatory. When the output voltage is low, it is very difficult to use self-driven synchronous rectification and additional windings are used to properly drive the metal oxide semiconductor field effect transmitters (MOSFETs). Besides this, IEC 1000-3-2 regulations impose low input current harmonic contents for power levels higher than 75 W. In this paper, a recently proposed synchronous rectification scheme is combined with a modified input current shaper to design a 100 W, 3.3 V AC/DC converter that complies with IEC 1000-3-2 regulations. The efficiency obtained in the prototype was very high for this application (86%) and both the size increase and the cost increase were quite low in comparison with the original topology with no synchronous rectification and no IEC 1000-3-2 compliance
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