Design and Placement of a Passive Clamp Snubber for Isolated SEPIC and Cuk Converters Working as Automatic Power Factor Correctors

Abstract

DC/DC power converters with galvanic isolation and using only one power transistor need elements that limit the voltage peaks at the beginning of the transistor turn off. These elements are called clamp snubbers. Its placement and design are well known for power converters with two reactive elements (e.g. flyback). However, different placements can be considered for those clamp snubbers in converters with higher number of reactive elements. Moreover, if the converter works as a Resistor Emulator (RE) in a Power Factor Corrector (PFC), the snubber must take into account the continuous variation of some of the electrical variables. This paper presents the study of four different placements for a passive clamp snubber network in a SEPIC converter working as an automatic RE, i.e., working in the Discontinuos Conduction Mode (DCM) and with a constant duty cycle during a line period. The value of the clamp snubber resistor needed to achieve a specific clamp voltage for these four options is determined in this paper. Moreover, the four options are compared in terms of the dissipated power in the snubber resistor. Consequently, it is possible to determine which one is going to be the best snubber option, in terms of efficiency. This study has been carried out for a SEPIC topology, and it is also valid for the Cuk one. Finally, all the study developed in this paper has been validated considering PSIM simulations and experimental results using a SEPIC prototype working as an automatic PFC.