Aging Modeling and Simulation of the Gate Switching Instability Degradation in SiC MOSFETs

Abstract

In order to conduct proper reliability investigations, aging models of silicon carbide (SiC) MOSFETs are needed to assess the possible effect that the degradation of these devices may have on the existing power electronic systems. These models should be able to accurately describe the long-term behavior of SiC MOSFETs. It has been recently discovered that (Gate Switching Instability) GSI is one of the most influential degradation processes. This work proposes the definition of a new model to describe the threshold voltage drift of SiC MOSFETs under GSI, from which a compact computational model is proposed to mimic this phenomenon. A new methodology is proposed to calibrate this computational aging model using experimental data, along with its extrapolation to a generic set of usage conditions. Compared to other proposed approaches, this model attempts to add new capabilities, such as the variation in the threshold voltage drift when using different application-related parameters (e.g., driving voltage and gate resistor).