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Efficient general reflectarray design and direct layout optimization with a simple and accurate database using multilinear interpolation

dc.contributor.authorRodríguez Prado, Daniel 
dc.contributor.authorLópez Fernández, Jesús Alberto 
dc.contributor.authorArrebola Baena, Manuel 
dc.date.accessioned2022-09-06T07:30:09Z
dc.date.available2022-09-06T07:30:09Z
dc.date.issued2022
dc.identifier.citationElectronics (switzerland), 11(2) (2022); doi:10.3390/electronics11020191
dc.identifier.issn2079-9292
dc.identifier.urihttp://hdl.handle.net/10651/64785
dc.description.sponsorshipThis work was supported in part by the Ministerio de Ciencia, Innovación y Universidades under project IJC2018-035696-I; by the Ministerio de Ciencia e Innovación and the Agencia Estatal de Investigación within project ENHANCE-5G (PID2020-114172RB-C21/AEI/10.13039/501100011033); by Gobierno del Principado de Asturias under project IDI/2021/000097.
dc.language.isoeng
dc.relation.ispartofElectronics (switzerland)
dc.rights© 2022 by the authors. Licensee MDPI
dc.rightsCC Reconocimiento 4.0 Internacional
dc.rights.urihttp://creativecommons.org/licenses/by/4.0/
dc.sourceScopus
dc.source.urihttps://www.scopus.com/inward/record.uri?eid=2-s2.0-85122393134&doi=10.3390%2felectronics11020191&partnerID=40&md5=7b55dfcd83b6dc66f6eaab7177f35fc3
dc.titleEfficient general reflectarray design and direct layout optimization with a simple and accurate database using multilinear interpolation
dc.typejournal article
dc.identifier.doi10.3390/electronics11020191
dc.relation.projectIDIJC2018-035696-I
dc.relation.projectIDMICINN/PID2020-114172RB-C21/AEI/10.13039/501100011033
dc.relation.projectIDIDI/2021/000097
dc.relation.publisherversionhttp://dx.doi.org/10.3390/electronics11020191
dc.rights.accessRightsopen access
dc.type.hasVersionVoR


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