Show simple item record

Design of a high performance VLC-LED driver for Visible Light Communication based on the split of the power

dc.contributor.authorGarcía Aller, Daniel 
dc.contributor.authorGonzález Lamar, Diego 
dc.contributor.authorArias Pérez de Azpeitia, Manuel 
dc.contributor.authorFernández Miaja, Pablo 
dc.contributor.authorSebastián Zúñiga, Francisco Javier 
dc.date.accessioned2021-02-08T12:02:33Z
dc.date.available2021-02-08T12:02:33Z
dc.date.issued2020
dc.identifier.isbn978-1-7281-7160-9
dc.identifier.isbn978-1-7281-7161-6
dc.identifier.urihttp://hdl.handle.net/10651/57812
dc.descriptionIEEE Workshop on Control and Modeling for Power Electronics (COMPEL) (21st. 2020. Aalborg, Denmark)spa
dc.description.abstractThis work proposes a VLC-LED driver for Visible Light Communication (VLC) based on two converters, a high frequency buck dc-dc converter and a low frequency boost dc-dc converter, connected in series regarding the LED load. A VLC system needs to fulfill two different tasks: biasing the LED and generating the communication signal. This two task have typically different power requirement, the bias power is 3/4, while the communication power is 1/4 of the total power. And the requirements of both are different: the communication signal requires a high frequency and a fast output response, while the biasing control requires a converter with slow output response. The proposed topology takes advantages of the differences between the two tasks and reaches high efficiency and high communication performance by means of splitting the power between the two converters. A high frequency buck dc-dc converter generates the communication signal, while the low frequency boost dc-dc converter is in charge of biasing the LEDs. This technique allows to process most of the DC biasing power by the low frequency converter (reaching high efficiency) and keeping the high frequency converter delivering the communication power (reaching high communication performance). As experimental results, the proposed VLC-LED driver is build and validated by reproducing a 64-QAM with a bit rate up to 1.5 Mbps, reaching a 91.5% of overall efficiency.spa
dc.description.sponsorshipEste trabajo fue apoyado en parte por European Regional Development-subvenciones del Fondo de mentores, en parte del Gobierno español en proyectos MINECO-17-DPI2016-75760-R, MINECO-20-PID2019-110483RB-I00 y MCIU-19-RTI2018-099682-A-I00, y en parte por el Principado de Asturias bajo proyecto IDI / 2018/000179 y beca BP17-91.spa
dc.language.isoengspa
dc.publisherIEEEspa
dc.relation.ispartofIEEE 21st Workshop on Control and Modeling for Power Electronics (COMPEL)spa
dc.rights
dc.subjectLight emitting diodesspa
dc.subjectDC-DC power convertersspa
dc.subjectTask analysisspa
dc.subjectHigh frequencyspa
dc.titleDesign of a high performance VLC-LED driver for Visible Light Communication based on the split of the powerspa
dc.typeinfo:eu-repo/semantics/bookPartspa
dc.identifier.doi10.1109/COMPEL49091.2020.9265676
dc.type.dcmitextspa
dc.relation.projectIDMINECO-17-DPI2016-75760-R
dc.relation.projectIDMINECO-20-PID2019-110483RB-I00
dc.relation.projectIDMCIU-19-RTI2018-099682-A-I00
dc.relation.projectIDPrincipado de Asturias IDI / 2018/000179


Files in this item

untranslated

This item appears in the following Collection(s)

Show simple item record