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Design trade-offs to meet class A IEC 61000-3-2 regulations with passive circuits in low power applications

dc.contributor.authorFernández González, Arturo José 
dc.contributor.authorSebastián Zúñiga, Francisco Javier 
dc.contributor.authorHernando Álvarez, Marta María 
dc.contributor.authorVillegas Saiz, Pedro José 
dc.contributor.authorGonzález Lamar, Diego 
dc.date.accessioned2015-08-21T08:33:57Z
dc.date.available2015-08-21T08:33:57Z
dc.date.issued2004-06
dc.identifier.isbn0-7803-8399-0
dc.identifier.issn0275-9306
dc.identifier.urihttp://hdl.handle.net/10651/32563
dc.format.extentp. 309-315spa
dc.language.isoengspa
dc.publisherIEEEspa
dc.relation.ispartof2004 IEEE 35th Annual Power Electronics Specialists Conference, 2004. PESC 04, 1spa
dc.titleDesign trade-offs to meet class A IEC 61000-3-2 regulations with passive circuits in low power applicationsspa
dc.typeinfo:eu-repo/semantics/conferenceObjectspa
dc.identifier.doi10.1109/PESC.2004.1355761
dc.type.dcmitextspa
dc.relation.publisherversionhttp://dx.doi.org/10.1109/PESC.2004.1355761spa


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