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Design trade-offs to meet class A IEC 61000-3-2 regulations with passive circuits in low power applications
dc.contributor.author | Fernández González, Arturo José | |
dc.contributor.author | Sebastián Zúñiga, Francisco Javier | |
dc.contributor.author | Hernando Álvarez, Marta María | |
dc.contributor.author | Villegas Saiz, Pedro José | |
dc.contributor.author | González Lamar, Diego | |
dc.date.accessioned | 2015-08-21T08:33:57Z | |
dc.date.available | 2015-08-21T08:33:57Z | |
dc.date.issued | 2004-06 | |
dc.identifier.isbn | 0-7803-8399-0 | |
dc.identifier.issn | 0275-9306 | |
dc.identifier.uri | http://hdl.handle.net/10651/32563 | |
dc.format.extent | p. 309-315 | spa |
dc.language.iso | eng | spa |
dc.publisher | IEEE | spa |
dc.relation.ispartof | 2004 IEEE 35th Annual Power Electronics Specialists Conference, 2004. PESC 04, 1 | spa |
dc.title | Design trade-offs to meet class A IEC 61000-3-2 regulations with passive circuits in low power applications | spa |
dc.type | conference output | spa |
dc.identifier.doi | 10.1109/PESC.2004.1355761 | |
dc.relation.publisherversion | http://dx.doi.org/10.1109/PESC.2004.1355761 | spa |
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