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Optimizing the design of single-stage power-factor correctors
dc.contributor.author | Villarejo, José Antonio | |
dc.contributor.author | Sebastián Zúñiga, Francisco Javier | |
dc.contributor.author | Soto, Fulgencio | |
dc.contributor.author | Jódar, Esther de | |
dc.date.accessioned | 2013-11-14T08:40:05Z | |
dc.date.available | 2013-11-14T08:40:05Z | |
dc.date.issued | 2007 | |
dc.identifier.citation | IEEE Transactions on Industrial Electronics, 54(3), p. 1472-1482 (2007); doi:10.1109/TIE.2007.894734 | |
dc.identifier.issn | 0278-0046 | |
dc.identifier.uri | http://hdl.handle.net/10651/19530 | |
dc.description.abstract | This paper presents a new analytical method for the generalized study of a cluster of single-stage power-factor correctors (S2PFCs). Due to this generalized approach, new topologies have been obtained, and the study of other known topologies has been simplified. The new analytical method simplifies the design of S2 PFCs by making it possible to compare a large number of different designs from the same viewpoint in order to identify the best topology. Finally, this research has enabled us to reduce the total size of the additional inductors that are used by a factor of two to three with respect to previous implementations | spa |
dc.format.extent | p. 1472-1482 | spa |
dc.language.iso | eng | |
dc.relation.ispartof | IEEE Transactions on Industrial Electronics, 54(3) | spa |
dc.title | Optimizing the design of single-stage power-factor correctors | spa |
dc.type | journal article | |
dc.identifier.doi | 10.1109/TIE.2007.894734 | |
dc.relation.publisherversion | http://dx.doi.org/10.1109/TIE.2007.894734 |
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