Fernández González, Arturo José
Sebastián Zúñiga, Francisco Javier
Villegas Saiz, Pedro José
Hernando Álvarez, Marta María
González Lamar, Diego
2013-11-12T10:42:26Z
2013-11-12T10:42:26Z
2005
IEEE Transactions on Industrial Electronics, 52(1), p. 77-87 (2005); doi:10.1109/TIE.2004.841136
0278-0046
http://hdl.handle.net/10651/19524
Power-factor correction has been one of the hottest topics during the last few years and, hence, many new circuits have appeared. In general, it is assumed that preregulators based on multiplier circuits have poor dynamics and, then, a second stage is needed to improve the output voltage dynamic behavior. The other option is the use of single-stage topologies which have fast output voltage regulation although the input current waveform is not sinusoidal. This work presents an analysis of the dynamic behavior of a conventional power-factor preregulator. The objective is to find the limits of the dynamic characteristics of these circuits when the priority is to improve the output voltage regulation and not the total harmonic distortion or the power factor. A large-signal model is presented and the theoretical results are validated with a prototype
p. 77-87
eng
IEEE Transactions on Industrial Electronics, 52(1)
Dynamic limits of a power-factor preregulator
info:eu-repo/semantics/article
10.1109/TIE.2004.841136
text
http://dx.doi.org/10.1109/TIE.2004.841136