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Design considerations for single-stage, input-current shapers for low output voltage ripple
dc.contributor.author | Villarejo, José Antonio | |
dc.contributor.author | Sebastián Zúñiga, Francisco Javier | |
dc.contributor.author | Soto, Fulgencio | |
dc.date.accessioned | 2015-08-25T09:10:12Z | |
dc.date.available | 2015-08-25T09:10:12Z | |
dc.date.issued | 2005-03 | |
dc.identifier.isbn | 0-7803-8975-1 | |
dc.identifier.uri | http://hdl.handle.net/10651/32803 | |
dc.format.extent | p. 1158-1162 | spa |
dc.language.iso | eng | spa |
dc.publisher | IEEE | spa |
dc.relation.ispartof | 20th Annual IEEE Applied Power Electronics Conference and Exposition, 2005. APEC 2005, 2 | spa |
dc.title | Design considerations for single-stage, input-current shapers for low output voltage ripple | eng |
dc.type | conference output | spa |
dc.identifier.doi | 10.1109/APEC.2005.1453144 | |
dc.relation.publisherversion | http://dx.doi.org/10.1109/APEC.2005.1453144 | spa |
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